Semiconductor packages have been continuously required to be thinned and lightened, and have been required to be implemented in a system in package (SiP) form requiring complexity and multi-functionality in terms of a function.
One type of package technology suggested to satisfy the technical demand as described above is a fan-out semiconductor package. Such a fan-out semiconductor package has a compact size and may allow a plurality of pins to be implemented by redistributing connection terminals outwardly of a region in which a semiconductor chip is disposed.
Recently, a cavity process has been mainly used to manufacture a fan-out type package. The cavity process may be, for example, a process of forming a cavity in a copper clad laminate (CCL), or the like, disposing an electronic component in the cavity, encapsulating the electronic component with an encapsulant, and forming a redistribution layer (RDL). Meanwhile, in the cavity process, the electronic component is disposed in the cavity, and it is thus necessary to dispose the electronic component precisely, and alignment between the electronic component and the CCL has an influence on matching between the electronic component and the redistribution layer.